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| Micrel, Inc. Precision Edge(R) 5.5GHz 1:4 FANOUT BUFFER/ Precision Edge(R) SY58022U TRANSLATOR w/400mV LVPECL SY58022U OUTPUTS AND INTERNAL INPUT TERMINATION FEATURES Precision 1:4, 400mV LVPECL fanout buffer Guaranteed AC performance over temperature and voltage: * > 5.5GHz fMAX clock * < 80ps tr/tf times * < 250ps (VIN 300mV) tpd * < 15ps max. skew Low jitter performance: * < 10psPP total jitter (clock) * < 1psRMS random jitter (data) * < 10psPP deterministic jitter (data) Accepts an input signal as low as 100mV Unique input termination and VT pin accepts DC- and AC-coupled differential inputs: LVPECL, LVDS and CML 400mV LVPECL compatible outputs Power supply 2.5V 5% and 3.3V 10% -40C to +85C temperature range Available in 16-pin (3mm x 3mm) MLFTM package Precision Edge(R) DESCRIPTION The SY58022U is a 2.5V/3.3V precision, high-speed, fully differential 1:4 LVPECL fanout buffer. Optimized to provide four identical output copies with less than 15ps of skew and less than 10psPP total jitter, the SY58022U can process clock signals as fast as 5.5GHz. The differential input includes Micrel's unique, 3-pin input termination architecture interfaces to differential LVPECL, CML, and LVDS signals (AC- or DC-coupled) as small as 100mV without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an on-board output reference voltage (VREF-AC) is provided to bias the VT pin. The outputs are 400mV LVPECL compatible, with extremely fast rise/fall times guaranteed to be less than 80ps. The SY58022U operates from a 2.5V 5% supply or 3.3V 10% supply and is guaranteed over the full industrial temperature range (-40C to +85C). For applications that require greater output swing or CML compatible outputs, consider the SY58021U 1:4 fanout buffer with LVPECL outputs, or the SY58020U 1:4 fanout buffer with 400mV CML outputs. The SY58022U is part of Micrel's high-speed, Precision Edge(R) product line. All data sheets and support documentation can be found on Micrel's web site at: www. micrel.com. APPLICATIONS All SONET and All GigE clock distribution Fibre Channel clock and data distribution Backplane distribution Data distribution: OC-48, OC-48+FEC, XAUI High-end, low-skew, multiprocessor synchronous clock distribution FUNCTIONAL BLOCK DIAGRAM TYPICAL PERFORMANCE Precison Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc. Rev.: B Amendment: /0 1 Issue Date: May 2005 Micrel, Inc. Precision Edge(R) SY58022U PACKAGE/ORDERING INFORMATION GND /Q0 VCC Ordering Information(1) Part Number Package Type MLF-16 (2) Q0 Operating Range Industrial Industrial Industrial Industrial Package Marking 022U 022U 022U with Pb-Free bar-line indicator 022U with Pb-Free bar-line indicator Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu 16 15 14 13 12 11 10 9 SY58022UMI Q1 /Q1 Q2 /Q2 IN VT VREF-AC /IN 1 2 3 4 5 6 7 8 SY58022UMITR SY58022UMI MLF-16 MLF-16 MLF-16 SY58022UMITR(2) Notes: GND /Q3 VCC Q3 1. Contact factory for die availability. Die are guaranteed at TA = 25C, DC electricals only. 2. Tape and Reel. 16-Pin MLFTM (MLF-16) PIN DESCRIPTION Pin Number 1, 4 Pin Name IN, /IN Pin Function Differential Input: This input pair receives the signal to be buffered. Each pin is internally terminated with 50 to the VT pin. Note that this input will default to an indeterminate state if left open. See "Input Interface Applications" section. Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap for each input (IN, /IN) to the termination network for maximum interface flexibility. See "Input Interface Applications" section. Reference Output Voltage: This output biases to VCC -1.2V. It is used when AC-coupling to differentail inputs. Connect VREF-AC directly to the VT pin. Bypass with 0.01F low ESR capacitor to VCC. See "Input Interface Applications" section. Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the pins as possible. A 0.01F capacitor should be as close to the VCC pin as possible. Ground. Exposed pad must be connected to a ground plane that is the same potential as the ground pin. LVPECL Differential Output Pairs: Differential buffered output copy of the input signal. The output swing is typically 400mV. Proper termination is 50 to VCC-2V at the receiving end. Unused output pairs may be left floating with no impact on jitter or skew. See "LVPECL Output Termination" section. 2 VT 3 VREF-AC 8, 13 5, 16 14, 15 11, 12 9, 10 6, 7 VCC GND, Exposed Pad /Q0, Q0, /Q1, Q1, /Q2, Q2, /Q3, Q3, 2 Micrel, Inc. Precision Edge(R) SY58022U Absolute Maximum Ratings(1) Power Supply Voltage (VCC ) ........................-0.5V to +4.0V Input Voltage (VIN).............................................-0.5V to VCC Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA VT Current Source or sink current on VT pin ......................... 100mA Input Current Source or sink current on (IN, /IN) ........................ 50mA VREF Current Source or sink current on VREF-AC, Note 4............. 1.5mA Soldering, (20 sec.) ................................................... 260C Storage Temperature Range (TSTORE ) .......... -65 to +150C Operating Ratings(2) Power Supply Voltage (VCC) .................. +2.375V to +3.60V Operating Temperature Range (TA) ............ -40C to +85C Package Thermal Resistance MLFTM (JA) Still-Air.......................................................................................................... 60C/W 500lpfm ....................................................................................................... 54C/W MLFTM (JB) (Junction-to-Board Resistance), Note 3 ........ 33C/W DC ELECTRICAL CHARACTERISTICS(Note 5) TA = -40C to +85C Symbol VCC ICC VIH VIL VIN VDIFF_IN RIN VREF-AC VT IN Parameter Power Supply Voltage Power Supply Current Input HIGH Voltage Input LOW Voltage Input Voltage Swing Differential Input Voltage IN-to-VT Resistance Output Reference Voltage IN-to-VT Voltage Condition VCC = 2.5V VCC = 3.3V No load, VCC = max IN, /IN, Note 6 IN, /IN IN, /IN; See Figure 1a IN, /IN; See Figure 1b VCC-1.6 0 0.1 0.2 40 50 Min 2.375 3.0 Typ 2.5 3.3 125 Max 2.625 3.60 160 VCC VIH-0.1 3.6 3.4 60 Units V V mA V V V V V V VCC-1.3 VCC-1.2 VCC-1.1 1.28 LVPECL DC ELECTRICAL CHARACTERISTICS(Note 5) VCC = 3.3V 10% or VCC = 2.5 5%; RL= 50 to VCC-2V; TA= -40C to 85C, unless otherwise stated. Symbol VOH VOL VOUT VDIFF_OUT Notes: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATINGS conditions for extended periods may affect device reliability. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. Thermal performance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. Due to the limited drive capability, use for input of the same package only. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. VIH (min.) not lower than 1.2V. Parameter Output HIGH Voltage Output LOW Voltage Output Differential Swing Deferential Output Swing Condition Min Typ Max Units V V mV mV VCC-1.145 VCC-1.020 VCC-0.895 VCC-1.545 VCC-1.420 VCC-1.295 see Figure 1a see Figure 1b 150 300 400 800 650 1300 2. 3. 4. 5. 6. 3 Micrel, Inc. Precision Edge(R) SY58022U AC ELECTRICAL CHARACTERISTICS VCC = 2.5V 5% or 3.3V 10%; RL = 50 to VCC-2V; TA= -40C to +85C, unless otherwise stated. Symbol fMAX Parameter Maximum Operating Frequency Condition VOUT 200mV Clock NRZ Data tpd tCHAN tSKEW tJITTER Data Propagation Delay Channel-to-Channel Skew Part-to-Part Skew Clock Cycle-to-Cycle Jitter Total Jitter Random Jitter Deterministic Jitter tr, tf Notes: 7. 8. 9. Skew is measured between outputs of the same bank under identical transitions. Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn-Tn-1 where T is the time between rising edges of the output signal. Min 5.5 Typ Max Units GHz 10 130 200 4 280 15 50 1 Gbps ps ps ps psRMS psPP psRMS psPP ps Note 7 Note 8 Note 9 Note 10 Note 11 Note 12 At full swing 2.5Gbps - 3.2Gbps 2.5Gbps - 3.2Gbps 20 10 1 10 50 80 Output Rise/Fall Time 20% to 80% 10. Total jitter definition: with an ideal clock input of frequency fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. 11. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps/3.2Gbps. 12. Deterministic jitter is measured at 2.5Gbps/3.2Gbps with both K28.5 and 223-1 PRBS pattern. TIMING DIAGRAM SINGLE-ENDED AND DIFFERENTIAL SWINGS Figure 1a. Single-Ended Swing Figure 1b. Differential Swing 4 Micrel, Inc. Precision Edge(R) SY58022U TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, VEE = 0V, VIN = 100mV, TA = 25C, unless otherwise stated. 5 Micrel, Inc. Precision Edge(R) SY58022U FUNCTIONAL CHARACTERISTICS VCC = 3.3V, VEE = 0V, VIN = 100mV, TA = 25C, unless otherwise stated. 6 Micrel, Inc. Precision Edge(R) SY58022U INPUT STAGE Figure 2. Simplified Differential Input Buffer INPUT INTERFACE APPLICATIONS Figure 3a. DC-Coupled LVPECL Input Interface Figure 3b. AC-Coupled LVPECL Input Interface Figure 3c. LVDS Input Interface Figure 3d. AC-Coupled CML Input Interface Figure 3e. CML Input Interface 7 Micrel, Inc. Precision Edge(R) SY58022U OUTPUT TERMINATION RECOMMENDATIONS LVPECL outputs have very low output impedance (open emitter), and small signal swing which results in low EMI (electro-magnetic interference). The LVPECL is ideal for driving 50- and 100-controlled impedance transmission lines. In addition, LVPECL is compatible for driving standard PECL inputs since PECL inputs require only 100mV input swing. Further, there are several techniques in terminating the LVPECL outputs, as shown in Figure 4 through 6. Figure 6. Terminating Unused I/O Figure 4. Parallel Termination-Thevenin Equivalent Notes: 1. For +2.5V systems: R1 = 250, R2 = 62.5 2. For +3.3V systems: R1 = 130, R2 = 83 Notes: 1. Unused output (/Q) must be terminated to balance the output. 2. For +2.5V systems: R1 = 250, R2 = 62.5, R3 = 1.25k, R4 = 1.2k. For +3.3V systems: R1 = 130, R2 = 82, R3 = 1k, R4 = 1.6k. 3. Unused output pairs (Q and /Q) may be left floating. Figure 5. Three-Resistor "Y-Termination" Notes: 1. Power-saving alternative to Thevenin termination. 2. Place termination resistors as close to destination inputs as possible. 3. Rb resistor sets the DC bias voltage, equal to VT. For +2.5V systems Rb = 19. For +3.3V systems Rb = 46 to 50. 4. C1 is an optional bypass capacitor intended to compensate for any tr/tf mismatches. RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION Part Number SY58020U SY58021U SY58022U Function 6GHz, 1:4 CML Fanout Buffer/Translator Internal I/O Termination 4GHz, 1:4 LVPECL Fanout Buffer/Translator with Internal Termination 5.5GHz, 1:4 Fanout Buffer/Translator w/400mV LVPECL Outputs and Internal Input Termination 16-MLFTM Manufacturing Guidelines Exposed Pad Application Note M-0317 HBW Solutions Data Sheet Link http://www.micrel.com/product-info/prod/ucts/sy58020u.shtml http://www.micrel.com/product-info/products/sy58021u.shtml http://www.micrel.com/product-info/products/sy58022u.shtml www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf http://www.micrel.com/product-info/as/solutions.shtml 8 Micrel, Inc. Precision Edge(R) SY58022U 16 LEAD MicroLeadFrameTM (MLF-16) PCB Thermal Consideration for 16-Pin MLFTM Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 qualification. 2. All parts are dry-packaged before shipment. 3. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE TEL SAN JOSE, CA 95131 WEB USA + 1 (408) 944-0800 FAX + 1 (408) 474-1000 http://www.micrel.com The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Inc. 9 |
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